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International Power Supply-on-Chip (PwrSoC) 2018 Workshop: An Outstanding Success!

Attended by leading global scientists and engineers sharing their greatest ever advancements in semiconductor integrated power conversion/management technologies and devices! Sponsored by the Power Sources Manufacturers Association (PSMA) and the IEEE Power Electronics Society (PELS)


The PwrSoC workshops gather outstanding academic and industry experts to discuss the challenges and opportunities in technology, design, and manufacturing necessary for advancement of miniaturized integrated power conversion and management solutions. The Power Sources Manufacturers Association (PSMA) and IEEE Power Electronics Society (IEEE PELS) are joint workshop sponsors.

This year the excitement grew as we organized and then held the PwrSoC 2018 workshop in Asia, in one of the world's leading semiconductor manufacturing centers, Hsinchu, Taiwan.


Workshop Attendees

The 2018 PwrSoC Workshop confirmed the strong advancement of the critical technologies necessary to commercialize miniaturized power management semiconductor circuits integrated with associated power passive components. The Workshop maintained its single track design to make sure attendees did not miss a single learning and sharing moment.

  • Topics drew upon the established package integrated approach (power supply in a package – (PSiP)
  • Leading ultimately to the low cost hybrid and fully on-chip solutions (power supply on chip – (PwrSoC).

The welcoming message to attendees was, "This year, we celebrate the 10-year workshop history with not only advanced technologies to build granular power supplies but also compelling demonstrations of commercialized products that make a clear case for PwrSoC and PSiP technologies becoming more prominent and mainstream." (See the full program at http://pwrsocevents.com/schedule/ and visit http://pwrsocevents.com/pwrsoc-2018-photos/ to see more pictures from PwrSoC2018.)

Introductory Remarks The attendees were warmly welcomed to the Workshop by Mau-Chung "Frank" Chang, President of the hosting university, National Chiao Tung University (NCTU) Hsinchu, Taiwan. He related the strong semiconductor technology history of the University. He was followed by Ke-Horng Chen, General Co-Chair from NCTU who suggested that the Antelects of Confucius may be helpful as attendees seek higher knowledge. He wished us a productive and exciting workshop.  Next, Cian O'Mathuna, from Tyndall Institute, Cork Ireland PwrSoC Workshop founder and General Co-Chair reminded us of the 10-year PwrSoC Workshop technical historical landscape. 

The Plenary Session was co-chaired by Ke-Horng Chen from National Chiao Tung University, Cian O'Mathuna of Tyndall National Institute, and Seth Sanders with UC Berkeley, U.S.A. The lead-off speaker was Soh Yun Siah from GLOBALFOUNDARIES sharing results of differentiate foundry approach to wafer bonded experimental GaN2BCDMOS explaining that foundries will become differentiated to include assembly functions, followed by James Doyle from Dialog Semiconductor explaining Dialog's 8 A 0.2 mm high converter results of stage 1 (external passives) of planned 2-stage (integrated passives). Peng Zhou from Huawei presented results of on-silicon magnetic thin film inductors development results – a key step towards their granular PwrSoC progress. Finally, Chien-Fan Chen of ASE explained their Semiconductor Embedded SUBstrate (SESUB) technology for robust integrated module devices having 0.3 mm or less thickness.

Session 1 Systems and Applications was co-chaired by Jose Cobos of UPM Madrid and Francisco Carobolante, U.S.A. Speakers analyzed developing approaches that are or will result in better performing power for opportunistic applications highlighted by next generation automotive system microprocessors and solid state regulators (SSRs), hearing aids, and networking systems.

Session 2 Topologies and Control co-chaired by Arnold Knott of Danish Technical University, Denmark, and Jason Stauth of Dartmouth College, U.S.A., focused on powertrain circuits and controller design for on-chip and other power supplies targeting miniaturization or integration with loads. The speakers include Dr. Christopher Schaef of Intel, Prof. Hanh-Phuc Le of University of Colorado, Dr. Toke Anderson of Nordic Power Converters, and Prof. Alexandre Prodic of University of Toronto. The speakers presented the latest advances in system architecture, converter circuit topologies, including high-frequency, multi-phase or multi-level configurations, resonant power converters operating at high and very high frequencies, switched-capacitor circuits, and hybrid converter topologies that enable ultra-high density miniaturization etc., as well as control systems enabling efficient operation at high frequencies. Particular applications covered in the session include power deliveries and power conversions for high-performance processors, data center, telecommunication systems, and LED drivers.

Session 3 Integrated Capacitive Devices co-chaired by Mohamed Mehdi Jatlaoul of Murata France and Vincent Chou from TSMC, Taiwan with MM Jataoul introducing PM Raj of Georgia Tech explaining that integrated tantalum film power capacitors are an attractive alternative to MLCC or deep trench approaches. He was followed by Jyun-Ying Lin from TSMC, Taiwan who shares their progress with deep trench capacitor (DTC) technology achieving 1.5 µF/mm2 with Vop range of 1.2 to 4 V.  Driven by demands in IoT, Frederic Nodet of Murata (formerly IPDiA) shared their progress with tailoring deep trench capacitors for applications using multiple current injection points to reduce ELS with a roadmap of 6 µF /mm2 by 2023. Finally, Lu Ming of ILika Technologies, China introduced their 250 µAh solid state battery as an alternative narrative.

Session 4 Integrated Magnetics co-chaired by Masahiro Yamaguchi of Tohoku University, Japan, Maeve Duffy of NUI, Ireland, and Charlie Sullivan of Dartmouth College, U.S.A., with Masahiro Yamaguchi introducing the speakers. The session started with Toshio Sato of Shinshu University, Japan addressing the beyond-MHz power conversion magnetics. Resulting application example was a dc-dc converter utilizing laminated Fe-based amorphous composite sheet core embedded in an organic interposer. Noah Sturcken laid out to potential users the compact circuit models for the Ferric Library of devices manufactured by TSMC. Paul McCloskey from Tyndall National Institute, Ireland shared the design, fabrication and characterization of their laminated amorphous CoZrTaB magnetic core material in a gate drive transformer. 3D micro-fabricated air-core inductors were produced by the Technical University of Denmark and applied to a 22 MHz 8.5 Vin, 3 Vout PSiP operating at 83% efficiency. Lastly, Baoxing Chen from Analog Devices presented the optimization of core and winding for the isolated power conversion micro-transformers backed by over 2.7 billion coupler channels of experience.

Session 5 Wide-Band Gap Semiconductors and Integration co-chaired by Bernhardt Wicht from Leibniz University, Germany and Brian Ma from the University of Texas at Dallas, U.S.A. introduced Dan Kinzer of Navitas U.S.A. as the first presenter sharing their progress and success with the combined power and driver high voltage/low voltage GaN in an integrated semiconductor chip. Kenneth Shepard of Columbia University, U.S.A. detailed their face-to-face bonded CMOS/GaN chips as applied to dc-dc converters that can achieve 40 A/mm2. Jef Thoné from MinDCet, a Belgium start up, described their approach to designing in close coordinated focus of the WBG power transistor and its driver. Lastly, Kevin Chen of Hong Kong University provided some insight into their analysis of the WBG device Roff dynamic behavior.


10th Year Anniversary Award presented to the Founding Father
Cian O'Mathuna by Trifon Liakapoulos and Arnold Alderman

Session 6 Systems Integration, Packaging, and Manufacturing with co-chairs by Hsiao-Ching Tuan fromTSMC, Taiwan and Lou Hutter from Lou Hutter Consulting, U.S.A., with Lou Hutter introducing, Haoyi Ye from Delta Electronics led off by covering Delta's high frequency VRM packaging approach. One of the workshop's highlights was Tim Phillips responding to the 20 to 40 processor voltage rails by introducing to the world Empower Semiconductor's first 10 A hybrid integrated regulators with fully integrated devices on the horizon. Next, S. Koduri from Texas Instruments dove deeply into the numerous packaging issues for high density integrated converters adding that "the package is an active enabler of high power density" and "with the adoption of WBG… some additional complexities arise." Ending the session, Sourabh Khandelval of Macquarie University, Sidney, delved into the Advance SPICE Modeling (ASM) of GaN devices with verified results focused on Roff transitioning loss prediction and minimization.

Session 7 Granular Power Supply was co-chaired by Miguel Rodringuez from AMD, U.S.A., and Santosh Kulkarni of Dialog Semiconductor with Pedro A. M. Bezerra from ETH Switzerland, collaborating with IBM Zurich, presented their work in highly integrated power supplies utilizing 2.5-D 14 nm CMOS. He was followed by Rinkle Jain of Intel sharing their progress in precisely powering graphic processors while coping with all their dynamics. Finally, Yan Lu from the University of Macau spoke regarding their work in switched capacitance (SC) converters, stating that the SC converters are more effective in dynamically sharing power stages for required fine grain processor voltage domains.

Poster Session was held Thursday evening. We were very fortunate to have thirty (30) outstanding posters exhibited. They are listed at  http://pwrsocevents.com/posters/

The Organizing Teams
The Workshop went successfully and smoothly thanks to our very devoted and well connected organizing team led by K.H. Chen, Cian, Hanh-Phuc, and the indispensible Ms. Tai who shepherded her local team making it a rich learning event. The Program Co-Chairs filled each session with revealing and noteworthy information thanks to their selection of valuable presentations.


PwrSoC 2018 Organizing Team


PSMA Presented the 2018 3D Power Packaging and the 2017 Power Technology Roadmap Reports, a value over $6000 USD, to Professor Ke-Horng Chen on behalf of National Chiao Tung University, Workshop Host

Exhibits
There were three product exhibit tables. Wurth Electroniks showcased their expanding number of 28 PSiP "MagI3C Power Modules, LED Modules up to 6 A and 60 V in range. Ferric exhibited their integrated magnetic cells from TSMC for the first possible merchant granular PwrSoC applications. Dialog Semiconductor demonstrated their 100 MHz 4-phase 8A buck converter that was highlighted in their plenary presentation.

The Attendees
Workshop attendance reached 158 attendees, 50% above our expectation, with 81 from Asia, 41 from Europe, 35 from North America, and one from Australia.

The program ended with a special treat for the attendees – a tour of TMC's historical Museum and the presentation of Hsinchu Science Park. Many thanksto TSMC, Hsinchu Science Park, and thanks to Landis Inn who provided lovely accommodations for workshop attendees.

Provided by:
Prof. Cian Ó Mathúna. PwrSoC2018 General Co-Chair
and Arnold Alderman, PwrSoC2018 Organizing Committee Member

 

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